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author | Aryadev Chavali <aryadev@aryadevchavali.com> | 2023-10-21 22:57:43 +0100 |
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committer | Aryadev Chavali <aryadev@aryadevchavali.com> | 2023-10-21 22:57:43 +0100 |
commit | dcedb70a5ccead41574cf857b369d264c87dd7e0 (patch) | |
tree | 45f4f9eb7a5258fc7ee1e25fbe4edaa05f82093f /src/base.h | |
parent | 266b4e4572be015dca986b423896ec6fa14b4318 (diff) | |
download | ovm-dcedb70a5ccead41574cf857b369d264c87dd7e0.tar.gz ovm-dcedb70a5ccead41574cf857b369d264c87dd7e0.tar.bz2 ovm-dcedb70a5ccead41574cf857b369d264c87dd7e0.zip |
Switched from floats to halfword
Registers are now just words, with pushing from and moving to
registers with specified subtypes just pushing those types into the
word registers. That means there are 8 word registers which can act
as 16 half word registers, which themselves can act as 64 byte
registers.
Diffstat (limited to 'src/base.h')
-rw-r--r-- | src/base.h | 14 |
1 files changed, 8 insertions, 6 deletions
@@ -26,27 +26,29 @@ typedef float f32; typedef double f64; typedef uint8_t byte; +typedef u32 hword; typedef u64 word; typedef union { byte as_byte; + hword as_hword; word as_word; - f64 as_float; } data_t; typedef enum { - DATA_TYPE_NIL = 0, - DATA_TYPE_BYTE = 1, - DATA_TYPE_WORD = 3, - DATA_TYPE_FLOAT = 5, + DATA_TYPE_NIL = 0, + DATA_TYPE_BYTE, + DATA_TYPE_HWORD, + DATA_TYPE_WORD, } data_type_t; #define DBYTE(BYTE) ((data_t){.as_byte = (BYTE)}) +#define DHWORD(HWORD) ((data_t){.as_hword = (HWORD)}) #define DWORD(WORD) ((data_t){.as_word = (WORD)}) -#define DFLOAT(FLOAT) ((data_t){.as_float = (FLOAT)}) +#define HWORD_SIZE sizeof(hword) #define WORD_SIZE sizeof(word) #define FLOAT_SIZE sizeof(f64) |