ovm - ARCHIVED - A stack based virtual machine to act as a target for other programming languages

Age	Commit message (Collapse)	Author
2023-10-21	Helper functions for read/write instructions from darr or FILE*	Aryadev Chavali

2023-10-21	Switched from floats to halfword	Aryadev Chavali
	Registers are now just words, with pushing from and moving to registers with specified subtypes just pushing those types into the word registers. That means there are 8 word registers which can act as 16 half word registers, which themselves can act as 64 byte registers.
2023-10-16	Added opcode_as_cstr, opcode_type_as_cstr and inst_print	Aryadev Chavali
	Pretty self explanatory, helps with logging.
2023-10-16	Fixed error with OP_PUSH where bits weren't in the pattern of data_type_t	Aryadev Chavali

2023-10-16	MOV and PUSH_*_REGISTER should only need bytes for their operand	Aryadev Chavali
	We won't have more than 255 registers, so a byte is all that's necessary.
2023-10-16	Added functionality to read and write instruction bytecode	Aryadev Chavali
	Uses some bit hacks to quickly check what data type an opcode may have by shifting down to units then casting it to a data_type_t. Not very well tested yet, we'll need to see now.
2023-10-16	Made OP_HALT the only instruction to have the top byte filled	Aryadev Chavali

2023-10-16	MOV now uses the stack, removed register member in inst_t	Aryadev Chavali
	Instead of taking an operand and a register, mov just uses the stack for the operand. Therefore, there's no need for a register member in inst_t. As a result, PUSH_*_REGISTER now uses the operand for the register.
2023-10-15	Better checking of opcode types	Aryadev Chavali
	Introduced an enum (opcode_type_t) for the masks and values of each opcode, which allows defining a single enum which checks an opcode by a opcode_type_t.
2023-10-15	Remove parameter for INST_*POP	Aryadev Chavali
	POP instructions do not require an operand: they're a unary operator.
2023-10-15	Set register parameter for inst_t to be a byte	Aryadev Chavali
	We at most have 255 registers, so no need to have a word for it.
2023-10-15	Renamed opcodes PUSH_REG to PUSH__REGISTER	Aryadev Chavali
	More precise in naming
2023-10-15	Rearranged opcodes (switched mov with push_reg)	Aryadev Chavali
	This is so push opcodes are closer together
2023-10-15	Added instructions to push register values onto the stack	Aryadev Chavali

2023-10-15	Added instructions for popping differing types	Aryadev Chavali
	Bit mask is 100.
2023-10-15	Added opcodes for MOV and ability for instructions to hold registers	Aryadev Chavali
	Pretty simple implementation
2023-10-15	Make push opcodes a specific bit set and add a NOOP opcode	Aryadev Chavali
	By default, a zero initialised set of instructions are NOOPs, which is great. Last two bits of a push opcode is always 01. Rest of the bits are used to distinguish between differing types of push. This makes it easier to inspect on the byte level what type of opcode we have.
2023-10-15	Split off instruction structure to its own file	Aryadev Chavali