Age | Commit message (Collapse) | Author | |
---|---|---|---|
2023-10-21 | Switched from floats to halfword | Aryadev Chavali | |
Registers are now just words, with pushing from and moving to registers with specified subtypes just pushing those types into the word registers. That means there are 8 word registers which can act as 16 half word registers, which themselves can act as 64 byte registers. | |||
2023-10-16 | Added functionality to read and write instruction bytecode | Aryadev Chavali | |
Uses some bit hacks to quickly check what data type an opcode may have by shifting down to units then casting it to a data_type_t. Not very well tested yet, we'll need to see now. | |||
2023-10-15 | Added macros for getting the maximum and minimum of two numbers | Aryadev Chavali | |
2023-10-15 | Moved vm_* code to its own file (runtime.(h|c)) | Aryadev Chavali | |
2023-10-15 | Split off general types and structures into separate header | Aryadev Chavali | |