Aryadev Chavali
cd19f1e1d3
Better checking of opcode types
...
Introduced an enum (opcode_type_t) for the masks and values of each
opcode, which allows defining a single enum which checks an opcode by
a opcode_type_t.
2023-10-15 22:16:31 +01:00
Aryadev Chavali
1cb54dc994
Remove parameter for INST_*POP
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POP instructions do not require an operand: they're a unary operator.
2023-10-15 22:06:30 +01:00
Aryadev Chavali
15ce778771
Set register parameter for inst_t to be a byte
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We at most have 255 registers, so no need to have a word for it.
2023-10-15 22:05:59 +01:00
Aryadev Chavali
744cc7acf7
Renamed opcodes PUSH_*REG to PUSH_*_REGISTER
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More precise in naming
2023-10-15 21:27:00 +01:00
Aryadev Chavali
4ae762294d
Rearranged opcodes (switched mov with push_reg)
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This is so push opcodes are closer together
2023-10-15 21:22:42 +01:00
Aryadev Chavali
54760d446c
Added instructions to push register values onto the stack
2023-10-15 21:19:49 +01:00
Aryadev Chavali
00517fddd6
Added instructions for popping differing types
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Bit mask is 100.
2023-10-15 21:09:00 +01:00
Aryadev Chavali
56c545e7c9
Added opcodes for MOV and ability for instructions to hold registers
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Pretty simple implementation
2023-10-15 21:03:27 +01:00
Aryadev Chavali
7a820290f9
Make push opcodes a specific bit set and add a NOOP opcode
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By default, a zero initialised set of instructions are NOOPs, which is
great.
Last two bits of a push opcode is always 01. Rest of the bits are
used to distinguish between differing types of push. This makes it
easier to inspect on the byte level what type of opcode we have.
2023-10-15 20:59:26 +01:00
Aryadev Chavali
40dfa5c255
Split off instruction structure to its own file
2023-10-15 17:38:35 +01:00
