5 Commits

Author	SHA1	Message	Date
Aryadev Chavali	dcedb70a5c	Switched from floats to halfword ... Registers are now just words, with pushing from and moving to registers with specified subtypes just pushing those types into the word registers. That means there are 8 word registers which can act as 16 half word registers, which themselves can act as 64 byte registers.	2023-10-21 22:57:43 +01:00
Aryadev Chavali	6038363d2f	Added functionality to read and write instruction bytecode ... Uses some bit hacks to quickly check what data type an opcode may have by shifting down to units then casting it to a data_type_t. Not very well tested yet, we'll need to see now.	2023-10-16 01:18:05 +01:00
Aryadev Chavali	98760ee63b	Added macros for getting the maximum and minimum of two numbers	2023-10-15 21:49:13 +01:00
Aryadev Chavali	639808a092	Moved vm_* code to its own file (runtime.(h|c))	2023-10-15 21:41:16 +01:00
Aryadev Chavali	a8747faa08	Split off general types and structures into separate header	2023-10-15 05:36:01 +01:00