Commit Graph

16 Commits

Author SHA1 Message Date
Aryadev Chavali
44f8c81efe Added opcode_as_cstr, opcode_type_as_cstr and inst_print
Pretty self explanatory, helps with logging.
2023-10-16 12:55:15 +01:00
Aryadev Chavali
4d9b8a04f2 Fixed error with OP_PUSH where bits weren't in the pattern of data_type_t 2023-10-16 01:20:11 +01:00
Aryadev Chavali
a4c9b85c79 MOV and PUSH_*_REGISTER should only need bytes for their operand
We won't have more than 255 registers, so a byte is all that's
necessary.
2023-10-16 01:20:06 +01:00
Aryadev Chavali
6038363d2f Added functionality to read and write instruction bytecode
Uses some bit hacks to quickly check what data type an opcode may have
by shifting down to units then casting it to a data_type_t.
Not very well tested yet, we'll need to see now.
2023-10-16 01:18:05 +01:00
Aryadev Chavali
a24a096e2a Made OP_HALT the only instruction to have the top byte filled 2023-10-16 01:06:02 +01:00
Aryadev Chavali
0f37a59940 MOV now uses the stack, removed register member in inst_t
Instead of taking an operand and a register, mov just uses the stack
for the operand.  Therefore, there's no need for a register member in
inst_t.

As a result, PUSH_*_REGISTER now uses the operand for the register.
2023-10-16 01:05:42 +01:00
Aryadev Chavali
cd19f1e1d3 Better checking of opcode types
Introduced an enum (opcode_type_t) for the masks and values of each
opcode, which allows defining a single enum which checks an opcode by
a opcode_type_t.
2023-10-15 22:16:31 +01:00
Aryadev Chavali
1cb54dc994 Remove parameter for INST_*POP
POP instructions do not require an operand: they're a unary operator.
2023-10-15 22:06:30 +01:00
Aryadev Chavali
15ce778771 Set register parameter for inst_t to be a byte
We at most have 255 registers, so no need to have a word for it.
2023-10-15 22:05:59 +01:00
Aryadev Chavali
744cc7acf7 Renamed opcodes PUSH_*REG to PUSH_*_REGISTER
More precise in naming
2023-10-15 21:27:00 +01:00
Aryadev Chavali
4ae762294d Rearranged opcodes (switched mov with push_reg)
This is so push opcodes are closer together
2023-10-15 21:22:42 +01:00
Aryadev Chavali
54760d446c Added instructions to push register values onto the stack 2023-10-15 21:19:49 +01:00
Aryadev Chavali
00517fddd6 Added instructions for popping differing types
Bit mask is 100.
2023-10-15 21:09:00 +01:00
Aryadev Chavali
56c545e7c9 Added opcodes for MOV and ability for instructions to hold registers
Pretty simple implementation
2023-10-15 21:03:27 +01:00
Aryadev Chavali
7a820290f9 Make push opcodes a specific bit set and add a NOOP opcode
By default, a zero initialised set of instructions are NOOPs, which is
great.

Last two bits of a push opcode is always 01.  Rest of the bits are
used to distinguish between differing types of push.  This makes it
easier to inspect on the byte level what type of opcode we have.
2023-10-15 20:59:26 +01:00
Aryadev Chavali
40dfa5c255 Split off instruction structure to its own file 2023-10-15 17:38:35 +01:00